關於

矽碳化合物(SiC):驅動未來的關鍵材料

矽碳化合物(SiC)擁有高熱傳導率、寬能隙、高擊穿電場強度及優異的耐電性,這些特性使其成為最具發展潛力的寬能隙(WBG)半導體材料,並受到市場的高度關注。SiC 的卓越性能在電力電子領域尤為關鍵,廣泛應用於電動車(EV)、電池儲能系統(BESS)及航太技術等市場,推動科技革新與產業升級。

SiC 6" N-Type Dummy

Grade Dummy
Diameter 149.5-150.0 mm
Polytype 4H
Thickness 350 um ± 25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
Flat Edge 47.5mm± 1.5mm
MP <5
Resistivity 0.014-0.028
LTV -
TTV < 10
Bow < 45
Warp < 60
BPD -
TSD -
TED -
EPD -
Roughness (Si/C) < 0.2/ <0.5
Inclusion NA
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <5*1010
Hexagonal Voids -
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
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SiC 6”4H N-Type SBD

Grade P-SBD
Diameter 149.5- 150.0 mm
Polytype 4H
Thickness 350 um ± 25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
Flat Edge 47.5mm± 1.5mm
MP <0.2
Resistivity 0.015-0.025
LTV <2
TTV <5
Bow < 20
Warp < 40
BPD <1500
TSD <200
TED <5000
EPD <5000
Roughness (Si/C) < 0.12/ <0.2
Inclusion A<0.2%
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <5*1010
Hexagonal Voids -
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
DOWNLOAD DOCUMENT

SiC 6”4H N-Type MOS

Grade P-MOS
Diameter 149.5-150.0 mm
Polytype 4H
Thickness 350 um ± 25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
Flat Edge 47.5mm± 1.5mm
MP <0.1
Resistivity 0.015-0.025
LTV <2
TTV < 5
Bow < 15
Warp < 35
BPD <800
TSD <100
TED <3500
EPD <4000
Roughness (Si/C) < 0.12/ <0.2
Inclusion A<0.1%
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <5*1010
Hexagonal Voids NP
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
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SiC 6”4H N-Type Diamond

Grade Diamond
Diameter 149.5- 150.0 mm
Polytype 4H
Thickness 350 um ± 25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
Flat Edge 47.5mm± 1.5mm
MP <0.1
Resistivity 0.015-0.025
LTV <2
TTV <5
Bow < 15
Warp < 35
BPD <150
TSD <100
TED <3500
EPD <4000
Roughness (Si/C) < 0.12/ <0.2
Inclusion A<0.1%
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <5*1010
Hexagonal Voids NP
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
DOWNLOAD DOCUMENT

SiC 8”4H N-Type Dummy

Grade Dummy
Diameter 199.5-200.0 mm
Polytype 4H
Thickness 350 um ± 25 um/500 um ±25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
MP <5
Resistivity 0.014-0.028
LTV <5
TTV <10
Bow < 40
Warp < 60
BPD -
TSD -
TED -
EPD -
Roughness (Si/C) < 0.2/ <0.5
Inclusion NA
Si-face scratches (Cumulative length) <5ea; CL<1.5D
Surface Metal Contamination <5*1011
Hexagonal Voids A<0.5%
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
DOWNLOAD DOCUMENT

SiC 8”4H N-Type SBD

Grade P-SBD
Diameter 199.5-200.0 mm
Polytype 4H
Thickness 350 um ± 25 um/500 um ±25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
MP <0.5
Resistivity 0.015-0.028
LTV <3
TTV <10
Bow < 25
Warp < 40
BPD <2000
TSD <1000
TED <6000
EPD <8000
Roughness (Si/C) < 0.2/ <0.5
Inclusion A < 0.05%
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <1011
Hexagonal Voids NP
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
DOWNLOAD DOCUMENT

SiC 8”4H N-Type MOS

Grade P-MOS
Diameter 199.5-200.0 mm
Polytype 4H
Thickness 350 um ± 25 um/500 um ±25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
MP <0.2
Resistivity 0.015-0.025
LTV <2
TTV <6
Bow < 15
Warp < 25
BPD <1000
TSD <100
TED <3000
EPD <4000
Roughness (Si/C) < 0.2/ <0.5
Inclusion A < 0.05%
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <1011
Hexagonal Voids NP
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
DOWNLOAD DOCUMENT

SiC 6" N-Type Epi (650V)

Substrate Specifications
Doping n-type Nitrogen
Resistivity 0.015-0.025 ohm.cm
Diameter 150.0±0.2 mm
Surface Orientation 4˚toward<11-20> ± 0.2˚
Primary Flat Orientation <11-20> ± 5 ˚
Secondary Flat Orientation None
Primary Flat Length 47.5 ± 1.5 mm
Secondary Flat Length None
Surface Finish Double Side Polish, Si Face CMP
Thickness 350 um ± 25 um
Buffer Layer
Doping n-type Nitrogen
Thickness 0.5~1um
Doping concentration 1x1018 cm3
Epitaxy Layer
Doping n-type Nitrogen
Thickness 5 ± 10%um
Thickness uniformity ≤ 8%
Doping concentration 1x1016 ± 15% cm3
Doping uniformity 6% σ/mean
Total usable area ≥95% (2mmx2mm)
Killer defect density 1/cm2
Post-epi Bow ≤30 um
Post-epi Warp ≤45 um
Post-epi TTV ≤7 um
Post-epi LTV ≤3 (10mmx10mm) um
Surface Roughness Si-face Ra≤0.5 nm
Metal Impurities 1x1011 atoms/cm2
Scratch Cumulative length ≤75 mm
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SiC 6" N-Type Epi (1200V)

Substrate Specifications
Doping n-type Nitrogen
Resistivity 0.015-0.025 ohm.cm
Diameter 150.0±0.2 mm
Surface Orientation 4˚toward<11-20> ± 0.2˚
Primary Flat Orientation <11-20> ± 5 ˚
Secondary Flat Orientation None
Primary Flat Length 47.5 ± 1.5 mm
Secondary Flat Length None
Surface Finish Double Side Polish, Si Face CMP
Thickness 350 um ± 25 um
Buffer Layer
Doping n-type Nitrogen
Thickness 0.5~1um
Doping concentration 1x1018 cm3
Epitaxy Layer
Doping n-type Nitrogen
Thickness 11 ± 10%um
Thickness uniformity ≤ 8%
Doping concentration 7x1015 ± 15% cm3
Doping uniformity 6% σ/mean
Total usable area ≥95% (2mmx2mm)
Killer defect density 1/cm2
Post-epi Bow ≤30 um
Post-epi Warp ≤45 um
Post-epi TTV ≤7 um
Post-epi LTV ≤3 (10mmx10mm) um
Surface Roughness Si-face Ra≤0.5 nm
Metal Impurities 1x1011 atoms/cm2
Scratch Cumulative length ≤75 mm
DOWNLOAD DOCUMENT

SiC 6" N-Type Epi (1700V)

Substrate Specifications
Doping n-type Nitrogen
Resistivity 0.015-0.025 ohm.cm
Diameter 150.0±0.2 mm
Surface Orientation 4˚toward<11-20> ± 0.2˚
Primary Flat Orientation <11-20> ± 5 ˚
Secondary Flat Orientation None
Primary Flat Length 47.5 ± 1.5 mm
Secondary Flat Length None
Surface Finish Double Side Polish, Si Face CMP
Thickness 350 um ± 25 um
Buffer Layer
Doping n-type Nitrogen
Thickness 0.5~1um
Doping concentration 1x1018 cm3
Epitaxy Layer
Doping n-type Nitrogen
Thickness 15 ± 10%um
Thickness uniformity ≤ 8%
Doping concentration 5x1015 ± 15% cm3
Doping uniformity 6% σ/mean
Total usable area ≥94% (2mmx2mm)
Killer defect density 1/cm2
Post-epi Bow ≤30 um
Post-epi Warp ≤45 um
Post-epi TTV ≤7 um
Post-epi LTV ≤3 (10mmx10mm) um
Surface Roughness Si-face Ra≤0.5 nm
Metal Impurities 1x1011 atoms/cm2
Scratch Cumulative length ≤75 mm
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SiC 8" HPSI Dummy

(Coming Soon)

SiC 6" HPSI Prime

(Coming Soon)
TAC SiC技術,驅動更美好的未來

台灣應用晶體(TAC)在單晶生長領域擁有豐富經驗,並掌握先進的SiC技術,使我們能夠在台灣市場中以最快速的創新能力持續突破。TAC生產高品質種晶,並透過精密的製程策略來解決各種晶體缺陷問題。

完整的SiC製程——從設備開發到晶圓製造——皆由TAC與LARGAN獨立研發,確保技術自主性與品質領先優勢。作為台灣少數能夠完整在地化SiC生產的企業,TAC在PVT晶體生長爐設計、熱場設計、晶體成長、製造流程及後製處理等方面擁有全面的技術實力,競爭優勢顯而易見。

TAC 優勢

TAC的SiC團隊開創全新技術路徑,使SiC晶圓具備更具成本效益、更環保,且品質更優的優勢,相較於傳統方法更加卓越。

01)
TAC透過專業的缺陷控制技術提升SiC單晶品質,確保晶圓的競爭性價格
02)
採用異質材料合成(HMS)技術,有效降低晶體缺陷,確保SiC單晶錠達到完美凸度,避免外來多型與顆粒夾雜。
03)
晶體生長凸度完美,確保單晶錠的有效厚度優於高凸度晶體,進而提高每輪生長的SiC晶圓產出率。
04)
除了提升單晶錠的有效厚度外,我們的大部分組件皆可重複使用,使得SiC晶圓不僅更具成本效益,也更加環保
05)
完美的晶體凸度可有效減少晶內應力累積,有助於降低位錯密度,進而提升SiC晶圓的品質。
SiC單晶發展歷史
驅動變革,創造未來

我們的未來願景是持續優化矽碳化合物(SiC)晶圓產業,並整合先進設備,以提升生產效率與產品品質。目前,我們正專注於6 吋SiC晶圓的開發,同時已成功達成8 吋Prime晶圓的量產目標。透過不斷創新與技術突破,我們致力於推動SiC產業邁向更高效、更精準的未來。

右一: 台灣應用晶體股份有限公司 董事長 黃有執 
正中: 台灣應用晶體股份有限公司 總經理 林謂昌
左一:國立成功大學智慧半導體及永續製造學院 副院長 周明奇
我們的合作夥伴