About
Silicon carbide (SiC) is a material with high thermal conductivity, wide bandgap, high breakdown and robust electric field strength. These exceptional properties make SiC a promising candidate of wide bandgap (WBG) semiconductor material, garnering increasing attention. Its advantages are particularly valuable in power electronics, where SiC is making significant impacts in markets such as electric vehicles (EVs), battery energy storage systems (BESS), and aerospace applications, among others.

SiC 6" N-Type Dummy

Grade Dummy
Diameter 149.5-150.0 mm
Polytype 4H
Thickness 350 um ± 25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
Flat Edge 47.5mm± 1.5mm
MP <5
Resistivity 0.014-0.028
LTV -
TTV < 10
Bow < 45
Warp < 60
BPD -
TSD -
TED -
EPD -
Roughness (Si/C) < 0.2/ <0.5
Inclusion NA
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <5*1010
Hexagonal Voids -
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
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SiC 6”4H N-Type SBD

Grade P-SBD
Diameter 149.5- 150.0 mm
Polytype 4H
Thickness 350 um ± 25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
Flat Edge 47.5mm± 1.5mm
MP <0.2
Resistivity 0.015-0.025
LTV <2
TTV <5
Bow < 20
Warp < 40
BPD <1500
TSD <200
TED <5000
EPD <5000
Roughness (Si/C) < 0.12/ <0.2
Inclusion A<0.2%
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <5*1010
Hexagonal Voids -
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
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SiC 6”4H N-Type MOS

Grade P-MOS
Diameter 149.5-150.0 mm
Polytype 4H
Thickness 350 um ± 25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
Flat Edge 47.5mm± 1.5mm
MP <0.1
Resistivity 0.015-0.025
LTV <2
TTV < 5
Bow < 15
Warp < 35
BPD <800
TSD <100
TED <3500
EPD <4000
Roughness (Si/C) < 0.12/ <0.2
Inclusion A<0.1%
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <5*1010
Hexagonal Voids NP
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
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SiC 6”4H N-Type Diamond

Grade Diamond
Diameter 149.5- 150.0 mm
Polytype 4H
Thickness 350 um ± 25 um
Wafer Orientation 4˚toward<11-20> ± 0.5˚
Flat Edge 47.5mm± 1.5mm
MP <0.1
Resistivity 0.015-0.025
LTV <2
TTV <5
Bow < 15
Warp < 35
BPD <150
TSD <100
TED <3500
EPD <4000
Roughness (Si/C) < 0.12/ <0.2
Inclusion A<0.1%
Si-face scratches (Cumulative length) <5ea; CL<0.5D
Surface Metal Contamination <5*1010
Hexagonal Voids NP
Packaging Multi-wafer cassette or single wafer container(vacuum, no air leakage & damage)
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SiC 8”4H N-Type Dummy

Grade Dummy
Crystal Growth Method PVT
Crystal Form 4H
Dopant Nitrogen
Diameter (mm) 200±0.2
Thickness (μm) 500±25
Notch Angle ( ° ) 90+5/-1
Notch Orientation ( ° ) [1-100]±5˚
Notch Depth (mm) 1~1.25
Surface Orientation ( ° ) 4˚toward<11-20> ± 0.5˚
Orthogonal Misorientation ( ° ) ±5.0
LTVmax (μm)
(10mm*10mm, Edge exclusion 3mm)		 ≤10
TTV (μm) ≤20
Bow (μm) -20~20
Warp (μm) N/A
Surface roughness
(Si-face / AFM 10mm*10mm / 5 Sites)		 ≤0.5
Surface roughness
(C-face / AFM 10mm*10mm / 5 Sites)		 ≤3
Resistivity (Ohm·cm) 0.010~0.030
BPD (ea/cm2) ≤3000
TED (ea/cm2) ≤8000
TSD  (ea/cm2) ≤1000
MPD  (ea/cm2) ≤1
Particle (ea) N/A
Scratches (mm) N/A
Basal Stacking fault density (%) N/A
TUA (%) N/A
Scratch count (ea)
( Visual )		 N/A
Carbon inclusions (%)
( Visual )		 N/A
Surface metal contamination
(each) Pass/Fail (atoms/cm2)
(Ca, Cr, Cu, Fe, K, Ni, Zn, Ti, Co, Mn)		 ≤5E10
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SiC 8”4H N-Type P-SBD

Grade P-SBD
Crystal Growth Method PVT
Crystal Form 4H
Dopant Nitrogen
Diameter (mm) 200±0.2
Thickness (μm) 500±25
Notch Angle ( ° ) 90+5/-1
Notch Orientation ( ° ) [1-100]±5˚
Notch Depth (mm) 1~1.25
Surface Orientation ( ° ) 4˚toward<11-20> ± 0.5˚
Orthogonal Misorientation ( ° ) ±5.0
LTVmax (μm)
(10mm*10mm, Edge exclusion 3mm)		 ≤3
TTV (μm) ≤6
Bow (μm) -20~20
Warp (μm) ≤35
Surface roughness
(Si-face / AFM 10mm*10mm / 5 Sites)		 ≤0.5
Surface roughness
(C-face / AFM 10mm*10mm / 5 Sites)		 ≤3
Resistivity (Ohm·cm) 0.015~0.025
BPD (ea/cm2) ≤1000
TED (ea/cm2) ≤4000
TSD  (ea/cm2) ≤200
MPD  (ea/cm2) ≤0.1
Particle (ea) ≤100 (Size≥0.3mm)
Scratches (mm) Total Length≤100
Basal Stacking fault density (%) ≤1
TUA (%) ≥96
Scratch count (ea)
( Visual )		 ≤0
Carbon inclusions (%)
( Visual )		 ≤0
Surface metal contamination
(each) Pass/Fail (atoms/cm2)
(Ca, Cr, Cu, Fe, K, Ni, Zn, Ti, Co, Mn)		 ≤5E10
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SiC 8”4H N-Type UP

Grade UP
Crystal Growth Method PVT
Crystal Form 4H
Dopant Nitrogen
Diameter (mm) 200±0.2
Thickness (μm) 500±25
Notch Angle ( ° ) 90+5/-1
Notch Orientation ( ° ) [1-100]±5˚
Notch Depth (mm) 1~1.25
Surface Orientation ( ° ) 4˚toward<11-20> ± 0.5˚
Orthogonal Misorientation ( ° ) ±5.0
LTVmax (μm)
(10mm*10mm, Edge exclusion 3mm)		 ≤3
TTV (μm) ≤5
Bow (μm) -20~5
Warp (μm) ≤35
Surface roughness
(Si-face / AFM 10mm*10mm / 5 Sites)		 ≤0.5
Surface roughness
(C-face / AFM 10mm*10mm / 5 Sites)		 ≤3
Resistivity (Ohm·cm) 0.015~0.025
BPD (ea/cm2) ≤600
TED (ea/cm2) ≤2000
TSD  (ea/cm2) ≤100
MPD  (ea/cm2) ≤0.1
Particle (ea) ≤60 (Size≥0.3mm)
Scratches (mm) Total Length≤100
Basal Stacking fault density (%) ≤0.3
TUA (%) ≥98
Scratch count (ea)
( Visual )		 ≤0
Carbon inclusions (%)
( Visual )		 ≤0
Surface metal contamination
(each) Pass/Fail (atoms/cm2)
(Ca, Cr, Cu, Fe, K, Ni, Zn, Ti, Co, Mn)		 ≤5E10
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SiC 6" N-Type Epi (650V)

Substrate Specifications
Doping n-type Nitrogen
Resistivity 0.015-0.025 ohm．cm
Diameter 150.0±0.2 mm
Surface Orientation 4˚toward<11-20> ± 0.2˚
Primary Flat Orientation <11-20> ± 5 ˚
Secondary Flat Orientation None
Primary Flat Length 47.5 ± 1.5 mm
Secondary Flat Length None
Surface Finish Double Side Polish, Si Face CMP
Thickness 350 um ± 25 um
Buffer Layer
Doping n-type Nitrogen
Thickness 0.5~1um
Doping concentration 1x1018 cm3
Epitaxy Layer
Doping n-type Nitrogen
Thickness 5 ± 10%um
Thickness uniformity ≤ 8%
Doping concentration 1x1016 ± 15% cm3
Doping uniformity 6% σ/mean
Total usable area ≥95% (2mmx2mm)
Killer defect density 1/cm2
Post-epi Bow ≤30 um
Post-epi Warp ≤45 um
Post-epi TTV ≤7 um
Post-epi LTV ≤3 (10mmx10mm) um
Surface Roughness Si-face Ra≤0.5 nm
Metal Impurities 1x1011 atoms/cm2
Scratch Cumulative length ≤75 mm
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SiC 6" N-Type Epi (1200V)

Substrate Specifications
Doping n-type Nitrogen
Resistivity 0.015-0.025 ohm．cm
Diameter 150.0±0.2 mm
Surface Orientation 4˚toward<11-20> ± 0.2˚
Primary Flat Orientation <11-20> ± 5 ˚
Secondary Flat Orientation None
Primary Flat Length 47.5 ± 1.5 mm
Secondary Flat Length None
Surface Finish Double Side Polish, Si Face CMP
Thickness 350 um ± 25 um
Buffer Layer
Doping n-type Nitrogen
Thickness 0.5~1um
Doping concentration 1x1018 cm3
Epitaxy Layer
Doping n-type Nitrogen
Thickness 11 ± 10%um
Thickness uniformity ≤ 8%
Doping concentration 7x1015 ± 15% cm3
Doping uniformity 6% σ/mean
Total usable area ≥95% (2mmx2mm)
Killer defect density 1/cm2
Post-epi Bow ≤30 um
Post-epi Warp ≤45 um
Post-epi TTV ≤7 um
Post-epi LTV ≤3 (10mmx10mm) um
Surface Roughness Si-face Ra≤0.5 nm
Metal Impurities 1x1011 atoms/cm2
Scratch Cumulative length ≤75 mm
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SiC 6" N-Type Epi (1700V)

Substrate Specifications
Doping n-type Nitrogen
Resistivity 0.015-0.025 ohm．cm
Diameter 150.0±0.2 mm
Surface Orientation 4˚toward<11-20> ± 0.2˚
Primary Flat Orientation <11-20> ± 5 ˚
Secondary Flat Orientation None
Primary Flat Length 47.5 ± 1.5 mm
Secondary Flat Length None
Surface Finish Double Side Polish, Si Face CMP
Thickness 350 um ± 25 um
Buffer Layer
Doping n-type Nitrogen
Thickness 0.5~1um
Doping concentration 1x1018 cm3
Epitaxy Layer
Doping n-type Nitrogen
Thickness 15 ± 10%um
Thickness uniformity ≤ 8%
Doping concentration 5x1015 ± 15% cm3
Doping uniformity 6% σ/mean
Total usable area ≥94% (2mmx2mm)
Killer defect density 1/cm2
Post-epi Bow ≤30 um
Post-epi Warp ≤45 um
Post-epi TTV ≤7 um
Post-epi LTV ≤3 (10mmx10mm) um
Surface Roughness Si-face Ra≤0.5 nm
Metal Impurities 1x1011 atoms/cm2
Scratch Cumulative length ≤75 mm
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SiC 8" HPSI Dummy

(Coming Soon)

SiC 6" HPSI Prime

(Coming Soon)

SiC 8" Ohmic-ULR

(Coming Soon)

SiC 12" HTC Carrier

(Coming Soon)
TAC Silicon Carbide Powering a Better Future
TAC possesses extensive experience in monocrystalline growth and has mastered the technology of SiC, enabling us to innovate more rapidly than any other company in Taiwan. TAC produce high-quality seed crystals and implement precise strategies to address various defects. The complete SiC process—from equipment development to wafer production—has been independently developed by the TAC and LARGAN.

As one of the few companies in Taiwan that fully localizes SiC production, TAC’s competitive edge is clear. We have expertise in all aspects, including the design of physical vapor transport (PVT) crystal growth furnaces, thermal field design, crystal growth, production processes, and post-processing.
6/8 inch PVT Crystal Growing System was Developed by TAC
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The TAC Advantage

TAC’s SiC team opened up a brand new path to make our SiC wafer more cost-effective, eco-friendly and better quality in comparison to the traditional method.

01)
We are equipped to tackle SiC monocrystal defects through a specialized process that enhances quality and ensures competitive pricing.
02)
TAC’s heterogeneous material synthesis (HMS) method reduces various defect thus grow SiC monocystalline ingot with perfect convexity without inducing foreign polytypes and particle inclusions.
03)
By growing crystal with perfect convexity, the effective thickness of the ingot will be larger than the highly convex ingot. This directly improves the productivity of the SiC wafers for each run of growth.
04)
In addition to the better effective thickness of the ingot, most of our components are reusable. With these advantages, our wafers are not only cost-effective but also much more eco-friendly.
05)
With such perfect convexity, less stress accumulates in the crystal which is conducive to lower the dislocation density and improve the quality of the wafer.
History of SiC Single Crystal Development
2023 Febuary
1st newborn 6’’ SiC single crystal
2023 December
1st 6’’ SiC single crystal with a smooth interface
2024 March
1st 6’’ SiC single crystal with 20mm thickness
2024 June
1st newborn 8’’ SiC single crystal
2024 July
1st 8’’ SiC single crystal with almost perfect interface
OUR VISIONEmpowering Change

Our future vision includes continuously optimizing the silicon carbide wafer industry and integrating advanced equipment to enhance production efficiency and product quality. Currently, we are dedicated to developing 6-inch production capabilities while successfully meeting mass production needs for 8-inch Prime wafers

Right: Jack HUANG CEO of Taiwan Applied Crystal Co., Ltd
Center: General Manager Wei-Chang LIN of Taiwan Applied Crystal Co., Ltd
Left:Professor Mitch M. C. Chou of National Cheng Kung University
Our Partnerships